EDN article highlights NanoWattICs' unique know-how in ultra-low-power IC Design

Optimization of power consumption has become a ubiquitous objective in CMOS analog IC design. Weak inversion operation (also known as sub-threshold) is a well-known approach for such optimization. However, in many cases, the best compromise in terms of power and performance is found in moderate inversion. The simple methodology described in this article allows straightforward exploration of the design space considering all regions of operation of the MOS transistor.

This article, published this week in EDN, highlights NanoWattICs' unique know-how in ultra-low-power IC Design. Find the complete article here: http://www.edn.com/design/power-management/4390477/Optimizing-analog-IC-designs-when-every-nanoAmpere-counts

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